[PCB Editor] OrCAD / Allegro PCB 리포트 출력 Parameter 리스트 (allegro pcb reports / OrCAD pcb reports)

리포트를 텍스트로 간단히 빠르게 출력할 수 있다. (아래 포스팅)

https://ansan-survivor.tistory.com/702

[PCB Editor] OrCAD/Allegro PCB text 편집기를 이용해 빠르게 리포트 뽑기

 

리포트 출력시 위 Extract UI에서 일일이 찾아야 하는데 어떤것이 있는지 잘 모른다.. 고로 모든 리스트를 Cadence 홈페이지에서 가져왔다.

Ctrl + F 로 찾아 쓰길..

BOARD
This view extracts the basic data about the design extents and scaling. extracta supplies the data automatically as the second J record of every extraction, so you usually do not need to extract the data with a separate view file.

#
# board_baseview - basic fields for the BOARD view
#
BOARD 
 BOARD_NAME
 BOARD_ACCURACY
 BOARD_UNITS
 BOARD_EXTENTS_X1
 BOARD_EXTENTS_Y1
 BOARD_EXTENTS_X2
 BOARD_EXTENTS_Y2
 BOARD_LAYERS 
 BOARD_THICKNESS
 BOARD_DRC_STATUS
 BOARD_SCHEMATIC_NAME
 BOARD_BOARD_THICKNESS
END
COMPONENT
This view extracts components in the design. The basic identifier of each record is the reference designator of the component.

COMPONENT
  REFDES_SORT
  REFDES
  COMP_CLASS
  COMP_PACKAGE
  COMP_DEVICE_TYPE
  COMP_VALUE
  COMP_TOL
  COMP_MAX_POWER_DISS_DEVICE
  COMP_MAX_POWER_DISS_INSTANCE
  COMP_ALT_SYMBOLS
  COMP_AUTO_RENAME
  COMP_COMPONENT_WEIGHT
  COMP_DENSE_COMPONENT
  COMP_DEVICE_LABEL
  COMP_FIX_ALL
  COMP_HARD_LOCATION
  COMP_HEIGHT
  COMP_INSERTION_CODE
COMP_MAX_POWER_DISS
  COMP_NO_MOVE
  COMP_NO_PIN_ESCAPE
  COMP_NO_ROUTE
  COMP_NO_SWAP_COMP
  COMP_NO_SWAP_GATE
  COMP_NO_SWAP_GATE_EXT
  COMP_NO_SWAP_PIN
  COMP_PART_NUMBER
  COMP_PIN_ESCAPE
  COMP_PLACE_TAG
  COMP_ROOM
  COMP_TERMINATOR_PACK
 COMP_VOLTAGE
  COMP_VOLT_TEMP_MODEL
  COMP_WIRE_BOND
END
COMPONENT_PIN
This view extracts pins of components in the drawing. The basic identifier of each record is the reference designator and pin number of the component pin. The difference between the COMPONENT_PIN view and the LOGICAL_PIN view (described later in this chapter) is that the COMPONENT_PIN view does not include pins of functions not yet assigned to components. Also, common pins (shared between functions) only occur once in the COMPONENT_PIN view, whereas they will occur once per function in the LOGICAL_PIN view.

This view differs from the COMPOSITE_PAD view (described next) in that there are no vias (or stand-alone pins) included in this view. Also, pins of unplaced components are included in this view and not in the COMPOSITE_PAD view.

COMPONENT_PIN
REFDES_SORT
PIN_NUMBER_SORT
REFDES
PIN_NUMBER
PIN_X
PIN_Y
PIN_EDITED
PIN_COMMON_CODE
PIN_SWAP_CODE
PIN_TYPE
PAD_STACK_NAME
NET_NAME
PIN_FLOATING_PIN
PIN_GROUND
PIN_NC
PIN_NO_PIN_ESCAPE
PIN_NO_SHAPE_CONNECT
PIN_NO_SWAP_PIN
PIN_PAD_STACK_NAME
PIN_PINUSE
PIN_PIN_ESCAPE
PIN_POWER
END
COMPOSITE_PAD
This view extracts pad data from symbol pins and vias in the design. You can use this view to get padstack and drill hole data.

COMPOSITE_PAD
CLASS
PAD_STACK_NAME
PAD_STACK_INNER_LAYER
PAD_STACK_TYPE
GRAPHIC_DATA_NAME
GRAPHIC_DATA_NUMBER
GRAPHIC_DATA_1
GRAPHIC_DATA_2
GRAPHIC_DATA_3
GRAPHIC_DATA_4
START_LAYER_NAME
START_LAYER_NUMBER
END_LAYER_NAME
END_LAYER_NUMBER
REFDES
PIN_NUMBER
PIN_X
PIN_Y
TEST_POINT
VIA_MIRROR
VIA_X
VIA_Y
NET_NAME
DRILL_HOLE_NAME
DRILL_HOLE_X
DRILL_HOLE_Y
DRILL_HOLE_PLATING
DRILL_ARRAY_ROWS
DRILL_ARRAY_COLUMNS
DRILL_ARRAY_CLEARANCE
DRILL_ARRAY_LOCATIONS
DRILL_FIGURE_CHAR
DRILL_FIGURE_SHAPE
DRILL_FIGURE_WIDTH
DRILL_FIGURE_HEIGHT
DRILL_FIGURE_ROTATION
VIA_NO_SHAPE_CONNECT
VIA_PAD_STACK_NAME
END
CONNECTIVITY
This view extracts data about electrical connections. The nets in the design are used to create records that represent a node or a connection. A node refers to the pins, vias, and Ts that are part of a logical net. A connection refers to ratsnest or etch geometry. The CONNECTIVITY baseview contains the following fields:

You can edit this baseview to add the WIREBOND_PROFILE_NAME property if, for example, you need to separate wires into their respective groups, or map them to some curvature.
CONNECTIVITY
#
NET_NAME != ’’
RAT_CONNECTED != ’YES’
#
NET_NAME_SORT
NODE_SORT
NODE_1_NUMBER
NODE_2_NUMBER
RECORD_TAG
CLASS
SUBCLASS
NET_NAME
GRAPHIC_DATA_NAME
GRAPHIC_DATA_NUMBER
GRAPHIC_DATA_1
GRAPHIC_DATA_2
GRAPHIC_DATA_3
GRAPHIC_DATA_4
GRAPHIC_DATA_5
GRAPHIC_DATA_6
GRAPHIC_DATA_7
GRAPHIC_DATA_8
GRAPHIC_DATA_9
GRAPHIC_DATA_10
NODE_CONNECTS
RAT_CONNECTED
REFDES
PIN_NUMBER
PIN_TYPE
PIN_X
PIN_Y
VIA_X
VIA_Y
VIA_MIRROR
PAD_STACK_NAME
START_LAYER_NAME
END_LAYER_NAME
COMP_DEV_TYPE
COMP_TERMINATOR_PACK
COMP_VALUE
SEG_CAPACITANCE
SEG_INDUCTANCE
SEG_IMPEDANCE
SEG_PROPAGATION_DELAY
SEG_RESISTANCE
END
FULL_GEOMETRY
This view contains the data in the GEOMETRY view plus detailed pad data. Pad data is defined as the actual pad in use for each subclass of a pin or via.

Standard geometries have the appropriate geometry (for example, CIRCLE) as the GRAPHIC_DATA_NAME, as well as their PAD_SHAPE_ NAME.

Pads that are arbitrary shapes are presented as a shape. The GRAPHIC_DATA_NAME is LINE (or ARC), and GRAPHIC_DATA_10 is SHAPE. Additionally the
PAD_SHAPE_NAME field contains the shape symbol name (preceded by FIG_SHAPE and space). The SYM_TYPE and SYM_NAME fields still reflect information about the parent symbol for pins and are empty strings for vias.

FULL_GEOMETRY
 CLASS
 SUBCLASS
 RECORD_TAG
 GRAPHIC_DATA_NAME
 GRAPHIC_DATA_NUMBER
 GRAPHIC_DATA_1
 GRAPHIC_DATA_2
 GRAPHIC_DATA_3
 GRAPHIC_DATA_4
 GRAPHIC_DATA_5
 GRAPHIC_DATA_6
 GRAPHIC_DATA_7
 GRAPHIC_DATA_8
 GRAPHIC_DATA_9
 GRAPHIC_DATA_10
 REFDES
 PIN_NUMBER
 PAD_STACK_NAME
 PAD_SHAPE_NAME
 PAD_TYPE
 PAD_FLASH
 DRILL_HOLE_X
 DRILL_HOLE_Y
 SYM_NAME
 SYM_TYPE
 NET_NAME
 PIN_X
 PIN_Y
 VIA_X
 VIA_Y
 SEG_CAPACITANCE
 SEG_IMPEDANCE
 SEG_INDUCTANCE
 SEG_PROPAGATION_DELAY
 SEG_RESISTANCE
END
FUNCTION
This view extracts functions in the drawing. The basic identifier in this view is the function designator. If the function is assigned to a component, you can extract any of the component’s data fields. If the component, in turn, is placed, you can extract any of the symbol’s data fields.

FUNCTION
 FUNC_DES_SORT
 FUNC_DES
 COMP_DEVICE_TYPE
 FUNC_TYPE
 REFDES
 FUNC_SLOT_NAME
 FUNC_SPARE_FLAG
 FUNC_GROUP
 FUNC_HARD_LOCATION
 FUNC_LOGICAL_PATH
END
GEOMETRY
This view extracts geometric elements of the design—the absolute coordinates of each element, formatted into data fields named GRAPHIC_DATA_n fields. Each n field has a different meaning depending on the type of geometric element it describes. See Extract Data Dictionary for a complete listing.

You can also extract any of the properties attached to any geometric element. For example, you can use GEOMETRY view data to extract the following:

Design outline data for N/C router programming
Types of geometry on an etch layer for translation to other systems, such as mechanical analysis systems
GEOMETRY
 CLASS
 SUBCLASS
 RECORD_TAG
 GRAPHIC_DATA_NAME
 GRAPHIC_DATA_NUMBER
 GRAPHIC_DATA_1
 GRAPHIC_DATA_2
 GRAPHIC_DATA_3
 GRAPHIC_DATA_4
 GRAPHIC_DATA_5
 GRAPHIC_DATA_6
 GRAPHIC_DATA_7
 GRAPHIC_DATA_8
 GRAPHIC_DATA_9
 GRAPHIC_DATA_10
 REFDES
 NET_NAME
 SYM_NAME
 COMP_DEVICE_TYPE
 SEG_CAPACITANCE
 SEG_INDUCTANCE
 SEG_IMPEDANCE
 SEG_PROPAGATION_DELAY
 SEG_RESISTANCE
 GEO_FILLET
 GEO_SYMBOL_ETCH
END
 GEO_FILLET
 GEO_SYMBOL_ETCH
END
LAYER
This view extracts data about the physical layers (for example, etch, multiwire, or dielectric) in the design. Layer information is obtained from the Cross Section parameter form.

LAYER
 LAYER_SORT
 LAYER_SUBCLASS
 LAYER_ARTWORK
 LAYER_USE
 LAYER_CONDUCTOR
 LAYER_DIELECTRIC_CONSTANT
 LAYER_ELECTRICAL_CONDUCTIVITY
 LAYER_LOSS_TANGENT
 LAYER_MATERIAL
 LAYER_SHIELD_LAYER
 LAYER_THERMAL_CONDUCTIVITY
 LAYER_THICKNESS
 LAYER_TYPE
END
LOGICAL_PIN
This view extracts function pins in the drawing. The difference between the LOGICAL_PIN view and the COMPONENT_PIN view (previously described) is that the COMPONENT_PIN view does not include pins of unassigned functions (functions not assigned to components). Also, common pins (shared between functions) occur only once in the component pin view, whereas they occur once per function in the logical pin view. The LOGICAL_PIN view does not include “non-function” pins, such as power, ground, and no-connect pins.

LOGICAL_PIN
 FUNC_DES_SORT
 PIN_NAME
 FUNC_DES
 REFDES
 PIN_NUMBER
 PIN_X
 PIN_Y
 PIN_EDITED
 PIN_COMMON_CODE
 PIN_SWAP_CODE
 PIN_TYPE
 PAD_STACK_NAME
 NET_NAME
 PIN_FLOATING_PIN
 PIN_GROUND
 PIN_NC
 PIN_NO_PIN_ESCAPE
 PIN_NO_SHAPE_CONNECT
 PIN_NO_SWAP_PIN
 PIN_PAD_STACK_NAME
 PIN_PINUSE
 PIN_ESCAPE
 PIN_POWER
END
NET
This view extracts net information from the design. The identifier in this view is the net name. You can use this view to extract all properties related to the nets (but not pins of nets; use LOGICAL_PIN or COMPONENT_PIN views for that).

NET
 NET_NAME_SORT
 NET_NAME
 NET_STATUS
 NET_CAPACITANCE
 NET_ETCH_LENGTH
 NET_ETCH_WIDTH_AVERAGE
 NET_IMPEDANCE_AVERAGE
 NET_IMPEDANCE_MAXIMUM
 NET_IMPEDANCE_MINIMUM
 NET_INDUCTANCE
 NET_MANHATTAN_LENGTH
 NET_MANHATTEN_LENGTH
 NET_PATH_LENGTH
 NET_PROPAGATION_DELAY
 NET_RESISTANCE
 NET_VIA_COUNT
 NET_BUS_NAME
 NET_PROPAGATION_DELAY
 NET_DIFFERENTIAL_PAIR
 NET_DIFFP_2ND_LENGTH
 NET_DIFFP_LENGTH_TOL
 NET_DRIVER_TERM_VAL
 NET_ECL
 NET_ECL_TEMP
 NET_EXTERNAL_NOISE
 NET_FIXED
 NET_LOAD_TERM_VAL
 NET_RELATIVE_PROPAGATION_DELAY
 NET_MAX_BOND_LENGTH
 NET_MAX_BVIA_STAGGER
 NET_MAX_EXT_NPOSE
 NET_MAX_FINAL_SETTLE
 NET_MAX_FIRST_SWITCH
 NET_MAX_OHM_LOSS
 NET_MAX_OVERSHOOT
 NET_MAX_PARALLEL
 NET_MAX_PEAK_BXTALK
 NET_MAX_PEAK_FXTALK
 NET_MAX_PROP_DELAY
 MET_MAX_SUM_BXTALK
 NET_MAX_SUM_FXTALK
 NET_MAX_THERM_SHIFT
 NET_MAX_UNDERSHOOT
 NET_MAX_VIA_COUNT
 NET_MIN_BOND_LENGTH
 NET_MIN_BVIA_GAP
 NET_MIN_BVIA_STAGGER
 NET_MIN_LINE_WIDTH
 NET_MIN_NECH_WIDTH
 NET_MIN_NOISE_MARGIN
 NET_MIN_PROP_DELAYT
 NET_NO_GLOSS
 NET_NO_PIN_ESCAPE
 NET_NO_RAT
 NET_NO_RIPUP
 NET_NO_ROUTE
 NET_NO_TEST
 NET_PROBE_NUMBER
 NET_RATSNEST_SCHEDULE
 NET_ROUTE_PRIORITY
 NET_ROUTE_TO_SHAPE
 NET_SAME_NET
 NET_STUB_LENGTH
 NET_TS_ALLOWED
 NET_VIA_LIST
 NET_VOLTAGE
 NET_WEIGHT
END 
RAT_PIN
This view extracts the COMPONENT_PIN view with NET_RAT_ SCHEDULE. This view is useful for retrieving the ratsnesting for a net.

COMPONENT_PIN 
 NET_NAME_SORT
 NET_RAT_SCHEDULE
 NET_NAME
 REFDES
 PIN_NUMBER
 PIN_X
 PIN_Y
END
SYMBOL
The basic identifier in this view is the symbol name (for example, DIP14). Use this view to extract symbol data from the design, whether or not the symbol has a component assigned to it.

SYMBOL
 SYM_TYPE
 SYM_NAME
 REFDES
 SYM_BOX_X1
 SYM_BOX_X2
 SYM_BOX_Y1
 SYM_BOX_Y2
 SYM_CENTER_X
 SYM_CENTER_Y
 SYM_EXTENTS_X1
 SYM_EXTENTS_X2
 SYM_EXTENTS_Y1
 SYM_EXTENTS_Y2
 SYM_HAS_PIN_EDIT
 SYM_MIRROR
 SYM_ROTATE
 SYM_X
 SYM_Y
 SYM_LIBRARY_PATH
 SYM_SHAPE_X_OFF
 SYM_SHAPE_Y_OFF
END

관련 자료는 Cadence PCB를 설치시 제공하는 Document 에서 자세히 볼 수 있다.

그 중 마지막 섹션인 "Extract Data Dictionary"

 

버전별 경로: 

C:\Cadence\SPB_16.6\doc\algrodescmp

C:\Cadence\SPB_17.2\doc

C:\Cadence\SPB_17.4\doc